Processor Design: System-On-Chip Computing for ASICs and FPGAs
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Processor Design: System-On-Chip Computing for ASICs and FPGAs
ed. Jari Nurmi
ISBN-13: 978-1402055294
Springer, 2007
Back in the 1980s, during the rise of the RISC era, it seemed that new processor architectures arose almost daily. The, through the 1990s, processor design centralized around a few major players, including Intel, AMD, and TI - the ones who could afford the design, verification, and foundry costs of a new chip. In the last five years or so, FPGAs became large enough to support soft processors with useful capabilities. All of a sudden, processor design has been democratized again - even undergrads can implement familiar architectures or novelties of their own.
This collection of papers presents a survey of processor design topics. Obviously, that include some history of RISC vs. CISC, DSP, VLIW, pipelining and interlock options, memory, and system interface. One chapter adresses the unique concerns of a processor architect working within the constraints of FPGA fabric. Written by the designer and implementer of the popular Nios soft core, this include some hard-won wisdom. Other sections, such as clock distribution, address the needs of ASIC designers. Case studies of a range of different architectures round out this discussion.
As happens with books of this type, few readers will benefit from all chapters. Instead, each reader should focus on the sections that apply most specifically to that reader's interests. That's not a real criticism, though, just a characteristic of this book's genre. If your work involves creating or customizing soft processor cores, I recommend this highly.
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