I just heard from the folks at ET International (ETI) and Pico Computing that an FPGA cluster has been used to provide near-real-time Value-at-Risk (VaR) and options pricing analysis, representing a greater than 1100X overall application speed-up when compared to an optimized software-only application.

VaR is an analysis method based on the probability and magnitude of losses given a specific time horizon, and has become the standard risk management index. However, VaR suffers several drawbacks due to its need for large numbers of iterative calculations. These drawbacks include increased costs for computing hardware, and long run times to generate results.

The folks at ETI are addressing the problem of VaR computation by deploying an FPGA-based, many-core parallel processing platform for analytics. Using their expertise in many-core parallel computing, they say that they have achieved a reduced-cost VaR solution that fund administrators can use to calculate VaR and adjust holdings in real time, drastically reducing risk exposure within a given risk tolerance.

In recent years, exotic financial instruments such as debt swaps and collateralized debt obligations (CDOs) have played larger roles in fund performance and volatility. These risky instruments and the associated uncertainties in the current financial environment create a greater need for risk measurement, using risk-adjusted return methods.

Asset pricing using the Black-Scholes equation forms the theoretical backbone for modern asset pricing, for example in the valuation of options. However, the financial community and regulators have found the accuracy of the Black-Scholes is not supported by empirical data. As a result, much research work has been done to extend the Black-Scholes model to accommodate new understanding of market behaviors. Stochastic methods that rely on Monte Carlo simulation using very fine time increments have shown to be more accurate for financial analytics, but are compute-intensive and therefore expensive to deploy on traditional servers.

The ETI αGreen FPGA-accelerated solution, which has been implemented using an FPGA cluster available from Pico Computing, has been shown to deliver more than 1100X acceleration when compared to a software solution running optimized Monte Carlo analytics code on an Intel Xeon processor.

From a cost perspective, the folks at ETI say that dramatic savings can be obtained by replacing 1100 or more high-end processors with a small cluster of FPGAs fitting in one server chassis. Total operational costs, including hardware purchase and power consumption, can cut by 20X. Multiple cards can be installed in one 4U server (up to 14) with each board having up to 16 FPGA devices, or individual PCIe cards can be added into existing servers. The ETI αGreen solution runs on broadly available PCIe compatible platforms, simplifying deployment. The solution is inherently scalable, and is extensible via libraries.

ETI and Pico Computing will demonstrate the FPGA-accelerated financial algorithms at the International Conference for High Performance Computing 2009 (SC09) November 14 - 20, 2009 in Portland, Oregon.