SystemC and Transaction-Level Modeling (TLM)
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Recently, I got together with a bunch of folks to discuss the current state-of-play with regard to the use of SystemC and Transaction Level Models/Modeling (TLM). As you will see, the results were rather interesting...
This was actually a lot of fun, because I learned a whole lot of "stuff" I really hadn't thought about before. One thing that because apparent is that it's hard to pin some of these things down ... in some cases the experts were in agreement, while other times they were in diametric opposition.
The questions I posed were as follows:
- Is SystemC and TLM a mainstream methodology in the market today?
- What are the main benefits that users are deriving from SystemC and TLM?
- How does SystemC adoption help address the critical path of today's systems projects?
- Is the adoption of SystemC and TLM being limited or held back in any way?
- What are the main use models for SystemC that are flourishing?
- What are the inhibitors of SystemC or TLM for mainstream usage?
- What is the typical learning curve to an Engineer? Team? Company?
- When first adopting SystemC, who are the typical first users? Designers? Verification Engineers? Architects? Others?
- Are there more standards that are needed to fuel SystemC adoption?
- Are SystemC synthesis and verification delivering on the promises of higher abstraction?
- Is it possible to deliver virtual platforms using synthesizable SystemC IP?
- What is needed for an IP eco-system to develop based upon SystemC?
For these discussions I was joined by a bunch (or should it be a "gaggle"?) of industry experts. This Listed in no particular order, this high-profile team is as follows:
- Brian Bailey, Independent Consultant and an expert in Verification and ESL (Brian is also the leader of the Verification and ESL communities on www.TechBites.com).
- Frans Theeuwen, Program Manager System Design, Corporate Innovation and Technology, NXP Semiconductors.
- Simon Davidmann, founder and CEO, Imperas.
- Laurent Ducousso, IP verification and System Modeling Manager, Home Entertainment Group (HEG) R&D, STMicroelectronics.
- Marc Schmitz, Verification Manager, STEricsson.
- Nagendra Gulur Dwarakanath, Texas Instruments.
- Patrick Sheridan, Director of Marketing, CoWare.
- Ravi Venugopalan, Verification Manager, Sonics Inc.
- Shabtay Matalon, ESL Market Development Manager, Mentor Graphics.
- J.C. Yeh, ESL Project Leader, Industrial Technology Research Institute (ITRI).
- David Beal, Technical Marketing Manager, Virtutech
- Andreas Ropers, Technical Marketing Manager – Fast Models, ARM.
- Steve Brown, Director of Marketing, System Design and Verification, Cadence Design Systems.

As you will see, some of these folks are men after my own heart in that they can waffle on about anything for hours. Others, however, are men of few words – they use their words sparingly and try to make each one count (grin).
Now, Click Here to see the discussions associated with Question #1
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