Recently, I got together with a bunch of folks to discuss the current state-of-play with regard to the use of SystemC and Transaction Level Models/Modeling (TLM). Here are the discussions relating to the first question: "Is SystemC and TLM a mainstream methodology in the market today?"

Question #1: Is SystemC and TLM a mainstream methodology in the market today?

Verification and Design Languages
SystemC for design and OVM e/SV for verification

Brian Bailey (Independent Consultant): To call it mainstream is perhaps stretching things a little too far. It is widely adopted by those companies who are putting in place an ESL methodology. It is primarily used for creating an abstract model of the hardware intended either for high-level synthesis or as a reference model against which the design is to be compared.

Steve Brown (Cadence): SystemC and TLM in particular are emerging standards in use by many customers in the market. As software considerations become more dominant to the hardware requirements, the benefits of SystemC and TLM motivate adoption. It is increasingly important to create new IP in shorter project schedules. The cost of RTL functional verification is one of the main reasons customers are looking at SystemC. Their investment in SystemC innovations for synthesis and functional verification will increase the benefits and use models. We see large companies building infrastructure to support TLM as a mainstream methodology for design, verification, and HW/SW development platforms.

Andreas Ropers (ARM): The SystemC and TLM methodology has two aspects: prototyping and design. With regard to a prototyping methodology we do see a strong momentum behind SystemC and TLM which is mainly triggered by the release of OSCI TLM-2.0 in 2008. IP providers like ARM and EDA tool vendors have been investing in this technology to provide users with a broad set of IP blocks with a standard interface as well as appropriate analysis and debug tools. For some people this is still a new technology, where they need to ramp up. Therefore it cannot be considered mainstream yet.

Patrick Sheridan (CoWare): Yes, absolutely. SystemC and TLM methodologies for the creation and use of virtual platforms are in production at electronics companies worldwide. This includes IP companies, semiconductor companies, and OEMs.

Frans Theeuwen (NXP): For System Level Modeling, SystemC and TLM are indeed the current mainstream technology. At least that holds for a number of the main semiconductor companies in Europe. These companies have already invested a lot of effort in the creation of a relevant methodology and the creation of a library of re-usable models.

Shabtay Matalon (Mentor): SystemC is the mainstream language for modeling SoC devices at a level of abstraction above RTL. Similarly, TLM (using the TLM 2.0 standard) is the mainstream methodology for modeling SoC design components at a level of abstraction above RTL.

Laurent Ducousso (STMicroelectronics): I guess yes; in fact this has been true for us since 2002.

Simon Davidmann (Imperas): SystemC, with the introduction of TLM-2.0, is moving into the mainstream for hardware-software co-verification. It is unclear whether pure embedded software development teams are adopting this technology, because they tend to need complete instruction accurate models of just the processors and very simple models of the hardware; register existence and SystemC/TLM2.0 is often overkill for this.

Nagendra Gulur Dwarakanath (TI): Clearly, TI sees a compelling need for EDA, ESL, IP, and SoC vendors to adopt SystemC and TLM standards. We believe that these standards are maturing and expect that mainstream adoption will pick up momentum in the next few years.

Marc Schmitz (STEricsson): Yes indeed, SystemC/TLM is used for a lot of purposes, including software development platforms, system or subsystem verification platforms, and platforms dedicated to architectural studies.

Ravi Venugopalan (Sonics): SystemC methodology is well accepted in Japan and Europe. The momentum is picking up in the United States, but is not yet an accepted methodology yet. TLM is the methodology in most places where SystemC is used.

David Beal (Virtutech): Yes, this is a methodology that is often introduced early in the development phase of silicon where the emphasis remains on individual device modeling for low-level firmware development. Wholesale adoption of SystemC and TLM are meeting some resistance for software developers since its performance is limited. Some modeling solutions such as Simics, however, are able to co-mingle SystemC models with models written in other languages. In this manner, developers are able to benefit from the speed of more efficient modeling languages whilst re-using specific devices that have been previously developed in SystemC.

J.C. Yeh (ITRI): Not yet.

Introduction/Overview | Question #2