Where we are and where we’re going?

He started to call it a long strange trip which started with ESDA (Electronic System Design Automation) until it was high jacked by a company called Summit, so Gary just had to change the name. In 2006, he claims ESL took off (SystemC IC 193311, Electronic System 338876, Embedded system 530027 and System Designers 44811.

Revenue for 2010 at about $300M and then the hockey stick projection. 2 killer apps, Synthesis and virtual prototypes. Says Mentor hard to beat in synthesis and Synopsys has bought everyone but Carbon and Imperas.

ESL languages. Still not a clear winner across the board. Interestingly did not even mention SystemVerilog for verification. Here he had SystemC, e and C. Says software methodology still up in the air as other pieces get sorted out. Three more killer apps to go – Architect’s workbench, silicon virtual prototype, virtualization + NoC (the new RTOS for many core SoC’s) and then embedded software automation. For ESA, up to ten new tools need to be developed and some of these will be killer apps.

For 2008, System VP 23%, synthesis 14%, architects workbench 21% Silicon VP 1%, other 41%.

Four user groups – System Architect, SoC System Designer, Board System Designer, Embedded System Software Developer. The first group is growing rapidly and is growing to include modeling.

As for ESL seats – almost all of them are Embedded Software seats. All of the others are almost in the noise. Seat ASP of $120,000 for the System Designers. For embedded SS, $40,000 per seat. That would still make it an $8B market. Will be taken over by free software tools, they will not be able to handle multi-core etc.

Wish list – A behavioral level SystemC standard, such as you may see in The Mathworks M language. A more robust SystemC testbench library – I am disappointed in the work you have done in this area, SystemC for embedded parallel processing software development – need some constructs that make it more software friendly. This is not to write their code, but to enable to react with it.

Questions

Shabtay Matalon of Mentor asked about ESL verification. Most of the 41% (other) is ESL verification. For software guys they have verification problems you wouldn’t believe. We verify, they just test. This has to change.

SV versus SC. Sv is really an RTL language that never made is up to high levels of abstraction. Just too painful.

Jack Donovan – IP industry grew in RTL industry. What about ESL? Gary – When you get over 1M gate blocks, a standard block is unusable, need modifyable blocks. Can disassemble and change without losing too much verification. These cannot be developed at the RT level. Says you can make money at Transaction modeling. Wont be able to play in the IP market for much longer without providing transaction level models.

------------------------------------------
Brian Bailey - keeping you covered