GATEROCKET ON FPGA VERIFICATION AT MARCH 18 FPGA VIRTUAL SUMMIT

GateRocket CEO Dave Orecchio will be a featured speaker at this week’s FPGA Virtual Summit, providing insight into how to streamline complex FPGA verification and debug by up to 50% or more, while improving design quality and results.  Offered free of charge, the FPGA Virtual Summit is a live, interactive, online conference featuring experts from throughout the FPGA supply and design industries.

WHO:  GateRocket®, supplier of advanced FPGA design and debug solutions for Xilinx and Altera programmable devices.

WHAT:  Orecchio will be featured in the FPGA Virtual Summit’s Verification Track, describing how his company’s latest innovations and improvements in Version 5.0 of its RocketVision® debug and RocketDrive® verification solutions can improve designers’ time to market with no changes to existing methodologies.

WHEN:  March 18, 2010, 10AM – 6PM (Eastern).  GateRocket will participate in the Verification Track which is being offered at 2:30PM (Eastern)/11:30AM (Pacific). Click here to register for this free event.  The FPGA Virtual Summit will have five separate tracks, and attendees can participate in any or all of them:

●10AM:  DSP Applications: Improve your DSP designs with FPGAs

●11:30AM:  FPGA Design Tools: Get your FPGA designs to market faster

●2:30PM:  FPGA Verification: Do you see what I see?

●4:30PM:  Keynote: Executive Round Table: The Future of FPGAs   

WHERE:  The FPGA Virtual Summit is an online conference being held March 18, 2010.  For more information:  http://www.fpgasummit.com/.  In a new approach with much more information than a single webinar but more focused than a general embedded conference, the FPGA Virtual Summit consists of five webcasts in a single day. The first four themed, technical sessions cover key topics for FPGA design engineers, system architects, and engineering decision makers.  Each will wrap with an “Ask the Experts” panel for attendees to ask their questions and network with vendors. 

WHY:  The significant increase in complexity and size of leading-edge FPGAs has put a strain on traditional verification and debug methods used in FPGA design. GateRocket is exclusively focused on this crisis, providing a unique way to locate design errors, quickly correct them, and verify the entire design with an extremely fast solution.  GateRocket recently released new enhancements to its RocketVision product that streamline this process even more, allowing designers to focus on individual portions of their design and make sure they function properly, without having to go through the entire synthesis-place-route cycle to identify and correct design flaws. This new approach dramatically reduces design time, and improves the efficiency of finding bugs in very complex designs.