Good grief! We certainly do live in interesting times. At 2:00 pm Pacific Time today, the folks from Xilinx unveiled a mega-hot new class of device they call an Extensible Processing Platform. "But what is this little beauty?" I hear you cry. Well, I shall explain...

Earlier this year, I was scheduled to have a chat about this-and-that with the folks at Xilinx. About five minutes before the time our call was due to commence, an email "pinged" its way into my InBox. This little scamp contained an image as an attachment with an accompanying message saying: "What do you think of this?"

I took one look at the image and responded: "Wow!" This was my first look at what I think it's fair to class as a new category of device – what the folks at Xilinx are calling an Extensible Processing Platform.

What's the first thing you notice when you look at this diagram? Is it perhaps the fact that you don’t see the word FPGA anywhere? But what is this ... aren’t FPGAs what Xilinx does best? In fact this device does contain a substantial amount of FPGA fabric – this is the dark gray area in the image above that is accompanied by the legends:

• Programmable logic for extensions
• High-performance, reconfigurable, application-optimized accelerators
• Additional peripherals

So why don’t we see the "FPGA" word? Well, the reason is that the folks at Xilinx do NOT want us to think of this as an FPGA with an embedded processor core. Rather, they want is to see it as an incredibly powerful processor core whose capabilities can be augmented and extended by means of configurable (whisper it, "FPGA") fabric.

This viewpoint is reflected in the way Xilinx are presenting the device and also in the way the design tools work. The primary target for this device is embedded software application developers. Of course, hardware design engineers will also come into the picture to work their magic with RTL and synthesis and suchlike to create the mega-cool, red-hot (sorry, I couldn’t help myself) hardware accelerators and suchlike... but these will be there to serve the needs of the software developers and the target application.

With regard to the processor itself, we're talking about a beefy ARM Cortex-A9 boasting dual high-performance superscalar cores with instruction/data caches, an L2 cache, timers, DMA, and all sorts of other goodies. These support 128-bit NEON SIMD. Also there's an associated floating-point unit (FPU).

This little rascal boots at power-up, meaning it can act as the system master. In addition to high bandwidth internal network interconnect, the device also supports a raft of dedicated connectivity capabilities, including USB 2.0 OTG; Tri-mode Ethernet (10/100/1G); UART, CAN, SPI, I2C, SDIO, GPIO; DDR2, LPDDR2, and DDR3 (phew!).

Then there are interconnect extensions into the FPGA fabric in the form of four 32-bit AXI master/slave ports and five 64/32-bit AXI configurable ports.  

The Extensible Processing Platform is going to be implemented in Xilinx's forthcoming 28nm technology. The FPGA fabric (which can be powered-down separately if required) includes some dedicated hard-core blocks, including 6.5 Gb/s SERDES blocks and PCIe Gen 1/2 blocks. There's also a system monitor block with an associated 12-bit analog-to-digital converter (ADC).

There's so much more to this device – but I'm at the embedded systems conference (ESC) and I have to run to another briefing, so I'll be reporting more about this little rapscallion real soon...