As you may recall, last week I wrote a blog about an Experts Design Challenge being held by those little rapscallions at Opal Kelly. The idea is to create an FPGA-based logic analyzer in a single working day. Well, the first expert to rise to the challenge is Rainer Malzbender, and his offering is a thing of beauty and a wonder to behold...

Just to make sure we're all tap-dancing to the same drum-beat, let's briefly remind ourselves that the folks at Opal Kelly make a variety of FPGA / USB modules. These are small circuit boards (only a few square inches in size), each of which contains an FPGA, a USB 2.0 interface chip, and a number of connectors.

Suppose you are building something incredibly clever – like a circuit board to implement a mega-cool robotic vision system, for example – and you wish use a USB interface to pass control and data information back and forth between your board and a PC. If you are not already an expert, USB can be something of a pain-in-the-rear to learn and use. This is where Opal Kelly leaps onto the center of the stage with a roll of drums and a fanfare of trumpets. You simply plug an appropriate Opal Kelly module onto your main board, configure the FPGA to perform any tasks you require of it (which – in addition to controlling the USB interface using a supplied IP block – can include pre-processing your image data, for example) and off you go.

Opal Kelly's FrontPanel Application Programming Interface (API) and Hardware Description Language (HDL) modules remove the burden of dealing with USB, but you'll still need to know an HDL like Verilog or VHDL, and how to use logic synthesis, and "stuff" like that. This may not be a problem if you are already a hardware design engineer, but if your expertise is in other areas you may simply not want to take the time to learn any new skills. In this case, the Folks at Opal Kelly can connect you to an appropriate expert freelance consultant who can work with you to configure an Opal Kelly module and deploy it into your design (see the  Experts Page on the Opal Kelly website).

But just how useful are Opal Kelly's modules? And just how easy are they to use? And just how good are these experts? (Inquiring minds want to know these things.) In order to answer these questions, the folks at Opal Kelly have come up with their "Experts Design Challenge". The idea is to present the experts with a design project that must be completed in a regular working day (say 8 to 10 hours). The first of these challenges is to create an FPGA-based logic analyzer, and the first expert to rise to the challenge is Rainer Malzbender.

Rainer started out in life as a physicist, obtaining undergraduate and PhD degrees from Princeton and the University of Colorado. Over the years he got hijacked by electronics, computers, and software, but he says that his physics background has left him "a generalist with an analytical bent." I was chatting with Rainer just the other day, and he's a really, really great guy. The picture below shows him in his home office holding the FPGA-based Opal Kelly logic analyzer he created.

Rainer says that he first ran across Opal Kelly's modules about four years ago when he was working for a client who was making MEMS (micro-electro-mechanical systems) displays. They needed someone with expertise in displays and image processing algorithms to develop the electronics used to drive the display. Note that this was a control interface – the video signals themselves go through a separate DVI port). Having said this, Rainer's interface did involve a lot of high-speed data transfers for things like the look-up tables used for gamma correction.

Rainer was conversant with hardware description languages and FPGAs – also with a variety of programming languages – the one thing he wasn't expert in was USB, and he really didn't feel a strong desire to learn it in excruciating detail. As Rainer told me: "So I started Googling around and discovered Opal Kelly. I thought their website was cool and their products were cool ... I got a warm fuzzy feeling so I recommended them to the client. This turned out to be a great decision, and since that time a number of my clients have used Opal Kelly's modules to develop a variety of products."

The folks at Opal Kelly also bundle their FrontPanel software and SDK (software development kit) with their modules. FrontPanel is an application and programmer's interface that runs on your PC, and that allows you to quickly and easily access and control your hardware. Rainer says that he uses the FrontPanel API and libraries extensively in his projects.

Rainer used to do a lot of work using C/C++ and a bit of Visual Basic, but he recently switched over to C# (pronounced "C Sharp"), .NET, and Microsoft Visual Studio 2008. He says: "This really is a fabulous development environment, which sounds strange coming from me because most folks think I'm a Linux advocate."

When he was first made aware of Opal Kelly's Design Challenge, Rainer says he felt a little intimidated and he wasn't sure if it was achievable in just one day, but he also thought it would be fun and decided to give it his best shot. One big advantage is that – over the years – Rainer has created lots of general-purpose software modules that perform all sorts of tasks, and that he can pull together to form the framework of a new project. And even if he can’t use an existing module directly, at some time in the past he will have faced similar problems and created something comparable: "And it's always easier to do something the second time around."

For myself, I was tremendously impressed with Rainer's solution. The graphical user interface (GUI) itself – as shown below – would be something that I would have thought should have taken way more than a day. But Rainer insists that he put no more than around 10 hours into this project. In fact, as luck would have it, he had recently been working on some projects that require drawing waveforms in a similar way.

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It seems to me that Rainer really went to town over this, adding lots of little frills and "bells and whistles". As one simple example, if you click on one of the signal names in the left-hand column, you are presented with a dialog that allows you to change the name, change the associated color in the waveform display, and so forth as shown below.

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Rainer has also included triggering options to initiate the capturing of signals, along with rudimentary Zoom and Scroll features in the display itself (he did, however, run out of time to add a timescale display).

One of the interesting problems with this sort of project is where to get the signals to use as inputs to the logic analyzer. I was really impressed with the solution Rainer came up with. He started by creating some signal generating blocks in the FPGA – these generated things like regular binary count sequences and pseudo-random sequences.

Initially Rainer fed these signals to "virtual inputs" insider the FPGA. That is, the FPGA was both generating the data to be analyzed and then "capturing" this data and passing it up to the PC via the USB port for processing and display on the PC's screen.

This is a really great starting point, but when you are doing this sort of thing there's always the chance that you start to be a little too cunning – that is, you can make things so "virtual" that they wouldn’t work in the real world. So this is where things really started to get clever. Rainer's Opal Kelly module was plugged into a breakout board. So the next step was to take the outputs from the test signal generator blocks inside the FPGA and to feed them to the FPGA's real outputs. Next, jumpers were used on the breakout board to loop these physical signals back to a set of the FPGAs inputs, and these real physical inputs were used as inputs to the FPGA (by removing the jumpers it would be possible to feed real-world signals into the FPGA). The result was as shown in the image below (the Opal Kelly module is the small board connected to the top of the breakout board – you can see the light-gray jumpers at the bottom of the breakout board):

You must admit that this is all rather ingenious. And really, whichever way you look at it, the final result is pretty amazing for a one-day effort. Of course Rainer is quick to point out that – due to the limited time constraints associated with this Design Challenge – he did not use a rigorous design methodology for this project, especially with regard to the absence of simulation. As he says: "This was all a bit loosey-goosey compared to real-world projects and this should in no way be considered to be a production-ready product."

Well, I for one am very impressed. I wouldn’t mind playing with some of this stuff myself... speaking of which, all of Rainer's design files (C# and HDL source code etc.), along with a "how I did it" document are available from the Opal Kelly website at www.opalkelly.com/experts/logic. Over the next few weeks I'll be interviewing and reporting on competing logic analyzer projects from two more experts, at which time their files will also appear in this archive.

Until next time, have a good one!