Wow! PrimeTime 2010 scales STA beyond 500 million instances!
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Good Grief, I can barely keep up with the flood of announcements issuing forth from those little rapscallions at Synopsys. Now they've announced something they call PrimeTime HyperScale technology that enables static timing analysis (STA) to scale beyond 500 million instances...
PrimeTime HyperScale technology has been designed to provide design engineers with the insight required to solve many of the timing integration and closure problems they face with today's large system-on-chip (SoC) design flows while delivering a 5 to 10X boost in performance and capacity.
I know... I know... how many times can someone claim to deliver a 5 to 10X boost in performance? On the one hand you'd think that after a relatively few generations of the tool being enhanced in this manner, it would be so fast that it world finish its task before you even manage to click the "Go" button.
Nonetheless, from what I can see it seems that they've managed it. According to their internal benchmarks (see image below), from 2006 to 2009 they achieved a 7X speedup in runtime coupled with a 2.5X reduction in memory requirements. Now, with PrimeTime HyperScale technology, they've managed to further boost performance by 5 to 10X (which means the little scamp is 35 to 70X faster than it was in 2006 – wow!

Speedup from 2006 to 2009 - now PrimeTime 2010 adds another 5 to 10X!
"But how can they have achieved this?" you cry. Well, I'm sure they used all sorts of complicated programming techniques that are beyond the ken of mortal man to understand. But one technique I could wrap my brain around was that when you move to perform a full-chip timing analysis, they can re-use a large proportion of the results from any block-level analyses. Of course this sounds easy when you say it quickly, but I bet it's horrendously complicated to make work ... fortunately that's not my problem (grin).
But we digress... back to the "official" announcement from the folks at Synopsys, who say that PrimeTime HyperScale technology fits seamlessly with today's large SoC physical implementation flows where designs are implemented in blocks and then assembled at the chip-level for final timing closure and signoff. It improves the timing closure process by providing design engineers a better mechanism to look at block-level timing in the context of the full-chip timing earlier in the design process.
By directly reusing block-level timing analysis and constraints, the HyperScale technology enables a 5 to 10X boost in full-chip STA runtime and capacity without the accuracy limitations in current modeling techniques. Its auto generation capabilities provide design engineers with accurate and up-to-date timing contexts for the chip and block throughout the design process, leading to better decisions and enabling fewer iterations to reach timing closure.
"We have been working with Synopsys to address the challenge of scaling timing analysis and signoff processes as our designs approach half a billion instances," said Jim Miller, corporate vice president, Design Engineering at Advanced Micro Devices. "We see the PrimeTime HyperScale technology as a natural fit to deliver long-term scalability by better matching the physical implementation and timing analysis methodologies, allowing us to begin the timing closure process much earlier in the flow. We are excited at the prospects for PrimeTime HyperScale technology, and have high expectations for the potential runtime, capacity, and productivity benefits that may be possible from this approach."
The new PrimeTime HyperScale technology enhances the existing Galaxy Implementation Platform by providing more precise timing context to drive timing closure in IC Compiler. In addition, the HyperScale technology works with existing PrimeTime features like signal integrity (SI) analysis, advanced on-chip variation (AOCV) analysis, multi-scenario analysis and threaded multicore analysis, enabling design teams to further boost STA productivity and improve overall timing closure turn-around-time.
Availability
The PrimeTime HyperScale technology is in limited customer availability and available to select customers in the PrimeTime SI 2010.06 release.
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