I guess we're all used to having to select between different FPGA vendors and – once we've selected a vendor – we have to choose between different FPGA families from that vendor... but the times they are a-changin'...

What am I waffling on about? Well, at the time of this writing, Xilinx offer two different families of FPGAs: the Spartan-6 family and the Virtex-6 family, each of which has a bunch of family members. (Of course Xilinx aren’t alone here ... having multiple families is pretty much common across all FPGA vendors.)

We typically don’t think much about this beyond the fact that we know Virtex devices offer the highest performance (and consume the most power) while their Spartan cousins offer more mainstream performance (and consume less power).

What are perhaps a little less obvious are the subtle differences between these two families. For example, they both offer a hard DSP core with the same name – the DSP48 – but these cores have slightly different carry logic. This has a number of implications, including the fact that the Xilinx guys have to support two different versions of this IP and it complicates the process of migrating a design from one family to another.

Is this really a problem? Does anyone really care (apart from the Xilinx guys who have to support two types of IP and – after all – whose fault is that)? How often does anyone want to port a design from one family to another? Well, it's actually becoming increasingly common to take a base design and implement it in low-end, mid-range, and high-end FPGAs.

As an off-the-top-of-my-head example (that just happens to match one of the images below), consider an ultrasound application. The same core algorithms (and thus FPGA logic) might be used in a lower-resolution, lower performance hand-held device; in a medium-resolution desktop unit; and in a high-resolution, extreme performance "all-singing all dancing" unit for deployment in a hospital. Trust me – if you wish to do something like this you'll appreciate all the help you can get to make the process as smooth and painless as possible.

This explains why the folks at Xilinx have just announced a rather cunning strategy. Here's the way I look at it. They're starting with their current Virtex-6 architecture and using this as the basis for their forthcoming 28 nm FPGAs. They're collectively calling these the Xilinx 7 Series of FPGAs. The trick is that they are presenting these new devices as three ... well, what should we call them? I hesitate to say "three families" because that might lead you to think that they are functionally different ... so I personally prefer to think of them as three branches of the same family (or should we say "portfolio"), where these branches are called and Artix-7, Kintex-7, and Virtex-7, respectively (Click Here to see a PDF containing the detailed product tables).

"And where did these names come from?" you may ask. Well, I just happen to be privy to the official explanation, which is as follows:

• Artix is rooted in Arctic, suggesting cool, low power. Artix delivers the lowest power and cost FPGAs in the industry. The Artix-7 family of products will offer 50% lower power and 35% lower cost than the Spartan-6 family, making this an industry-leading family ideally suited for the cost-sensitive, high-volume markets served by ASSPs and ASICs.
• Kintex gets its roots form the word kinetic for movement and energy. Kintex also takes its name from the word kin, meaning related. Kintex brings the industry’s best combination of price and performance. The new Kintex-7 family delivers the performance of Virtex-6 at half the cost. It not only addresses aggressive power and cost requirements with significant price/performance improvements over Virtex-6 and Spartan-6, but also delivers on the emerging need for insatiable bandwidth in applications that include next generation broadcast systems and wireless networks.
• Virtex  represents the summit and highest capability. The Virtex-7 family delivers the industry’s highest system performance and capability. The new Virtex-7 family now provides the industry’s largest device (2M logic cells) and delivers 2X system performance over previous generations. Virtex-7 is designed to meet the high performance needs of wired infrastructure, high performance computing systems and aerospace and defense among others. This family also includes the EasyPath-7 cost reduction product to facilitate the move to high volume production.

The point is that both of the new branches – Kintex-7 and Artix-7 – share a unified architecture with Virtex-7 that allow for easy migration and design and IP portability.

OK Let's turn our attention to the official press release from the guys and gals at Xilinx, which contains all sorts of techno-weenie details (dripping with only the finest marketing buzzwords), and which reads as follows:

The 28nm families extend Xilinx’s Targeted Design Platform strategy introduced with the company’s 40nm Virtex-6 and 45nm Spartan-6 FPGA families, now in volume production. The Targeted Design Platform strategy combines FPGAs, ISE Design Suite software tools and IP, development kits, and targeted reference designs to enable customers to leverage their existing design investments and reduce their overall costs as they meet evolving market needs. In this new generation, Xilinx also takes a critical next step in its work to dramatically expand the ecosystem of available IP and designs that enable customers to focus on differentiation even as they transition to 28nm devices.

"The 7 series represents a new juncture for Xilinx, and the FPGA industry in general, as we bring our technology portfolio to new markets by putting a significant emphasis on lowering power consumption," said Xilinx President and CEO Moshe Gavrielov. "In addition to delivering what we and our customers expect from Moore’s Law in terms of capacity and performance with each new generation, we continue our focus on opening programmable logic to a broader audience by delivering design platforms targeted toward the specific needs of new users and markets."

Delivering the Industry’s Lowest Power 28nm FPGAs
The new FPGA families enable developers to implement programmable solutions in a range of systems that had previously only been achievable in ASSPs or ASICs, including portable ultrasound equipment consuming less than 2 watts and automobile infotainment systems driven by 12 volts, as well as low-cost LTE baseband and femtocell base stations.

Xilinx placed an intense focus on minimizing total power by adopting a unique HKMG (high-K metal gate) process optimized for low static power consumption (see “Xilinx Picks 28nm High-Performance, Low-Power Process to Accelerate Platforms for Driving the Programmable Imperative”). Working with its foundry partners, Xilinx helped define the new process to achieve FPGA performance requirements, while lowering static power consumption by 50 percent compared to the alternative 28nm high-performance process. Xilinx then applied innovative architectural enhancements to lower dynamic power consumption both for logic and I/O, while also introducing intelligent clock-gating technology with the release of ISE Design Suite 12. The result is an FPGA series that provides 50 percent lower total power consumption compared to Virtex-6 and Spartan-6 FPGAs and 30 percent lower than alternative 28nm FPGA device families.

The significantly lower power consumption not only enables FPGAs to target new applications, it also allows Xilinx to deliver the most usable performance in the 28nm generation of devices. This means designers can take full advantage of up to 4.7TMACS in DSP performance symmetric mode (2.37TMACs in non-symmetric mode) and 2 million logic cells at clock speeds of up to 600MHz, and achieve up to 2.4Tbps high-speed connectivity all while staying within their power budgets.

New Unified Architecture Enables Scalability and Increases Productivity
All 7 series FPGAs share a unified architecture that enables customers to easily scale their designs up or down in capability to reduce cost and power or increase performance and capability, thereby reducing their investment in developing and deploying products across low-cost and high-performance families. The architecture is derived from the widely successful Virtex-series-based architecture and has been designed to simplify reuse of current Virtex-6 and Spartan-6 FPGA designs. It is also supported by the proven EasyPath^™ FPGA cost reduction solution that further improves productivity by enabling a guaranteed 35 percent cost reduction with no incremental conversion or engineering investment.

Customers who need the lower power or increased system performance and capacity provided in the new 7 series FPGAs can begin designs in Virtex-6 and Spartan-6 FPGAs with the confidence that they can move their designs when the time is right. This unified architecture is facilitated by Xilinx’s adoption of the AMBA AXI interconnect standard enabling plug-and-play IP usage to help customers improve productivity and development costs.

"Integrating 6-LUT architecture and working with ARM on the AMBA specification for these devices supports IP reuse, portability, and predictability," said Andy Norton, CTO for Systems Architecture, Cloudshield Technologies, an SAIC company. "A unified architecture, new paradigm-changing processor-centric devices and hierarchical-based design flows in next-gen tools, will result in increased productivity, flexibility, system-on-chip capabilities and portability from previous generation architectures."

The devices use the same logic architecture, Block RAM, clocking technology, DSP slices, and SelectIO technology and build on previous generations of devices delivered by Xilinx’s patented Virtex series ASMBL block architecture. This next generation ASMBL architecture provides unprecedented flexibility and scalability that enables customers to most effectively utilize the full range of logic densities.

Introducing the New Xilinx 7 Series FPGA Families:

• Virtex-7 Family: Delivering a 2X system performance improvement at 50 percent lower power compared to Virtex-6 devices, the ultra high-end Virtex-7 family sets new industry benchmarks with 1.8X greater signal processing performance, 1.6x greater I/O bandwidth, 2X greater memory bandwidth with 2133 Mbps memory interfacing performance, and delivers the industry’s largest density FPGA with 2 million logic cells, which is 2.5X greater density than any previous or existing FPGA. EasyPath-7 devices are also available for all Virtex-7 FPGAs for a guaranteed 35% cost reduction without requiring any design conversion. Virtex-7 devices enable 400G bridging and switch fabric wired communication systems that are at the heart of the global wired infrastructure, advance RADAR systems, and high-performance computer systems that require single-chip TeraMACC signal processing capabilities, as well as the logic density, performance, and I/O bandwidth required for next generation test and measurement equipment. The Virtex-7 family will include “XT” extended capability devices with as many as 80 transceivers supporting individual line rates up to 13.1Gbps and devices that provide up to 1.9Tbps serial bandwidth. Also, these devices offer up to 850 SelectIO pins enabling the industry’s greatest number of parallel banks of 72-bit DDR3 memory interfaces supporting 2133Mbps. Future devices will also feature 28Gbps transceivers.
  
  
• Kintex-7 Family: Establishing a new category of FPGAs, the Kintex-7 family delivers Virtex-6 family performance at less than half the price for a 2x price/performance improvement while consuming 50 percent less power. The family includes high-performance 10.3Gbps or lower-cost optimized 6.5Gbps serial connectivity, memory, and logic performance required for applications such as high volume 10G optical wired communication equipment. It also provides a balance of signal processing performance, power consumption, and cost to support the deployment of Long Term Evolution (LTE) wireless networks, meet the aggressive power and cost requirements required for next generation high definition 3D flat panel displays, and deliver the performance and bandwidth needed for next generation broadcast video-on-demand systems.
  
  
• Artix-7 Family: Delivering 50 percent lower power and 35 percent lower cost compared to the Spartan-6 family, the Artix-7 family utilizes small form-factor packaging and the unified Virtex-series based architecture to deliver the performance required to address cost-sensitive, high-volume markets previously served by ASSPs, ASICs, and low-cost FPGAs. This new family meets low power performance requirements of battery-powered portable ultrasound equipment, and addresses small form factor, low power requirements for commercial digital camera lens control, as well as the strict size, weight, power, and cost (SWAPc) requirements for military avionics and communications equipment.

Availability
Early access ISE Design Suite software supporting 7 series FPGAs is now available. Initial devices will be available in Q1 of CY2011. For more information, please visit: www.xilinx.com/7.