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Optimal Configuration of your Reconfigurable PLL

 

A short while ago I posted a contributed piece by Erik Mentze, Sr. Systems Engineer, at Cypress Semiconductor entitled "Optimal Configuration of your Reconfigurable PLL". This is a topic that ought to be of keen interest to anyone engaged in mixed-signal designs.

Unfortunately, after some sort of server misfarch, the equation, figure, and table images were lost. I've reposted the piece at http://www.techbites.com/201006252839/myblog/blog/z0028-optimal-configuration-of-your-reconfigurable-pll.html with graphics intact. Take a look and post your comments.
Discussion started by Joshua Israelsohn , on 25 June 01:53 PM
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