Levels of virtual prototypes |

Levels of virtual prototypes

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It appears that there are four accepted levels of Virtual Prototypes, each separated by different levels of detail in the timing. These can be called untimed, loosely timed, approximately timed and cycle accurate. Whenever I talk to a company about which ones they support, they always seem to say: my customers want X and Y, so these are the only ones I support. I would love to hear from customers which they use and why.

Discussion started by Brian Bailey , on 23 September 09:25 AM

Replies

Hemendra Talesara, 2009-12-07 08:39:29

I think four level of abstraction are sufficiently good for general needs. On practical level, however, many people use hybrid approach based on their usecase and availabilty (or non-availability) of models. This seem to work best. For example, (1) its perfectly ok to have a Cycle accurate or even approximtely timed models for IP participating in the critical path of performance analysis (such as memory-subsystem), but other IPS that contribute minimally to traffic can be at other level of abstraction. (2) Similarly, it is perfectly ok to have cycle accurate or even RTL model for an IP where SW does not spend many cycles in a fast untimed virtual platform for some specific SW development (3) Similar arguments can be made for Verification and other usecase.

I think having this ability to mix really provide a nice migration path to folks still in fully RTL world or fully in Systems world.

Brian Bailey, 2009-10-14 13:52:16

Interesting discussion about this topic in a webcast today. You should be able to get a replay at: http://ecast.opensystemsmedia.com/ or check out my blog for a report about it: http://techbites.com/20091014721/myblog/blog/eda-esl-and-more-from-dac-webcast.html