Virtual Platform for Virtual Prototype |

Virtual Platform for Virtual Prototype

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Sometimes people get confused on the mixing of the two terms.

Should we agree they are the same thing?

I have been primarily using Virtual Platform in my writing.
http://www.cadence.com/Community/posts/jasona.aspx

Discussion started by Jason Andrews , on 12 January 11:30 AM

Replies

Brian Bailey, 2010-02-18 11:47:08

I had never thought of it in those terms, but I like it. We know that when say prototype it can be virtual (at multiple levels of abstraction) or physical (at a number of different levels including FPGA's emulation, surrogate chips etc), but does the software person care? They may need to know something about the accuracy of the environment if they are working on low-level timing dependent drivers, but other than that, I am sure they just see it as an environment on which software can be run and debugged. So maybe it is like relativity - the platform or prototype is as seen by an observer, which may be different than what is seen by the provider.

Jason Andrews, 2010-02-15 21:43:11

I have picked up recently that EDA-types seem to like Prototype better and ESW-types seem to like Platform better. I think EDA likes Prototype better because it conveys a somewhat temporary situation where the Prototype is discarded when something better is available such as an FPGA prototype is used until the actual silicon is ready. ESW-types see Virtual Platform as a permanent model even after the chip or board is ready because it has benefits that actual silicon cannot provide in terms of controllability, observability, and repeatability.

Brian Bailey, 2010-01-14 11:33:36

In my view a platform is a subset of a prototype. A platform normally refers to a pre-packaged mixture of hardware and software components that can be configured in many ways, but does not in general include the environment in which it operates. A platform may also not include ancillary devices such as displays, peripherals or user interface components. In addition, I think for most people the limits of a platform are at the chip boundary.

Having said that I remember back to the days of VSIA where the definition of a platform was such a hotly contested term, that they had to provide several alternative definitions just to please everyone. There was a whole chapter on this in my taxonomies book.