Good conferences for functional verification |

Good conferences for functional verification

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I would like to start a discussion about conferences that are suitable for verification people. DAC tends to be of academic interest, DVCon with regards to languages and tools, DesignCon used to be good at user experiences but seems to have trailed of in recent years. What other conferences should verification people attend?

Discussion started by Brian Bailey , on 17 September 05:12 PM

Replies

Brian Bailey, 2010-05-03 12:05:32

Facing challenges in ensuring the quality of your designs?
Please attend the 15th IEEE International High Level Design Validation and Test Workshop (HLDVT), co-located with DAC, June 11-12, 2010.

http://www.hldvt.com/10/

HLDVT 2010 advances research in validation, verification and test methodologies for integrated circuits and systems. The workshop focuses on addressing the current bottlenecks in validation and test of complex and heterogeneous systems by both employing high-level specifications (such as register transfer level, behavioral and system-level models) and developing associated tools, techniques and methodologies to enable drastic reduction in overall design, validation and test effort. The workshop provides a forum for leaders in both industry and academia to advance the means for validating, debugging, synthesizing, and testing complex systems in a way that opens new avenues to overcome current validation and test challenges.

This year, HLDVT provides rich program with five regular sessions, five special sessions, one tutorial, one panel and one keynote speech. There are several areas of focus. First, there is a session on firmware validation and a session on hardware-dependent software, to highlight the importance of embedded software. A session and a panel will be devoted to multi-clock systems and clock domain crossing verification, deployed in a variety of scenarios. One session will be devoted to transaction-level modeling, and another one will deal with high-level arithmetic circuit descriptions to obtain more from the circuits. Industry leaders in Electronic System Level (ESL) design will bring forward their perspectives on verification challenges at ESL, and a variety of papers will deal with formal verification advances, constraint solving, coverage and verification accelerators and emulators.

The complete program is available at http://www.hldvt.com/10/program.pdf

Further information including registration details are available at the HLDVT webpage http://www.hldvt.com/10. Please do not hesitate to contact us (prabhat@cise.ufl.edu or zeljko.zilic@mcgill.ca) if you have additional questions.

Brian Bailey, 2009-12-14 12:21:49

DVCon 2010 Technical Program, Tutorials and Panels

DVCon is the premier conference for functional design and verification of digital electronic systems. This conference is focused on bringing you information from the leading edge of technology, techniques, standards and methods.
What you can expect:
The conference is continually striving to improve from year to year, incorporating new and fresh ideas proposed by attendees and committee members. You can expect a high-quality technical program with sponsored tutorials, technical panels, embedded tutorials, and research sessions, as well as informative (and delicious) sponsored luncheons.

Register: https://reg.mpassociates.com/reglive/register.aspx?confid=108
Program http://www.dvcon.org/file/DVCon_2010_advanceProgram.pdf

"DVCon is one of our favorite events of the year and always has been…it is a very focused show. Everyone that goes to this show is interested in Design and Verification, therefore the conversations are very interesting and we can have “Real” in-depth discussions." Carol Hallett - VP Worldwide Sales and Marketing for Real Intent, Inc.