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        <title><![CDATA[TB-Blog - TechBites]]></title>
        <description><![CDATA[TechBites - The Science and Technology Collaborative Community]]></description>
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                <guid isPermaLink="false">2506-563</guid>
	            <title><![CDATA[Reason #4 to Customize a Processor Core - Use an Automated Process: The best is not alweays the best]]></title>
	            <link>/201004052506/myblog/blog/z000c-reason-4-to-customize-a-processor-core-use-an-automated-process.html</link>
	            <description><![CDATA[
	            	            I would be more inclined to defend Paula's article. While it may be true that the very smallest or fastest implementation may come from a dedicated solution, these tend to be fixed in function, whereas in many cases there is a need for both performance, time to market and flexibility. Consider an audio codec. I am sure you could build an MP3 decoder in hardware much smaller and faster than a Tensilica processor, but what happens when the codec is updated, or an additional format is required. With a custom solution you are likely fried unless of course you designed a flexible process to do it - in which case you probably would do no better than their solution. Solutions are all trade-offs between many functions and factors and if there were one right solution, then we would all be out of jobs very quickly.	            ]]></description>
                <category><![CDATA[TB-Blog]]></category>
                <pubDate>Tue, 06 Apr 2010 16:35:38 -0500</pubDate>
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                <guid isPermaLink="false">2506-561</guid>
	            <title><![CDATA[Reason #4 to Customize a Processor Core - Use an Automated Process: Lesson from VLSI - learned or not?]]></title>
	            <link>/201004052506/myblog/blog/z000c-reason-4-to-customize-a-processor-core-use-an-automated-process.html</link>
	            <description><![CDATA[
	            	            Back-end or VLSI Designers know that critical parts of hardware need to be designed out manually. Its known as 'custom layout', as opposed to 'cell/library based layout'. Can configured processors, such as those of Tensilica be used to create critical applications, where speed is more important than time-to-market?
   However, other (non-sensitive) applications would, in most cases,  be better served if a configured processor is used.
   Any ideas on improving both time-to-market and speed simultaneously?
	            ]]></description>
                <category><![CDATA[TB-Blog]]></category>
                <pubDate>Tue, 06 Apr 2010 14:54:06 -0500</pubDate>
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