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1. (jCommunity Group) Tuesday, 31 December 2069 2. New companies at DAC this year (MyBlog/TB-Blog) Brian Bailey publishes his list of new companies at DAC this year in the verification and ESL space. Click here for full list and what the companies are up to. Brought to you by Brian Bailey ... Monday, 09 May 2011 3. Interview Bites: Metro Ethernet Forum's Nan Chen on Carrier Ethernet (MyBlog/TB-Articles) ... Global Interconnect? Nan Chen: It consists of the actual technical specifications, the standards, verification, and the operational processes that we're working on to enable the smooth transition from ... Monday, 02 November 2009 4. SystemC and Transaction-Level Modeling (TLM) (MyBlog/TB-Blog) ... to an Engineer? Team? Company? When first adopting SystemC, who are the typical first users? Designers? Verification Engineers? Architects? Others? Are there more standards that are needed to fuel SystemC ... Monday, 21 December 2009 5. Brian Bailey’s must see list for DAC 2010 (MyBlog/TB-Blog) ... and HW/SW integration issues, and ChipEstimate (521) (part of Cadence) for chip estimation and planning. Verification Zocalo Tech (1509) – with their assertion creation and control tools and NextOp ... Monday, 07 June 2010 6. The fate of NuSym becomes clear (MyBlog/TB-Blog) While I have seen no announcements, it becomes clear today that Synopsys has acquired the assets of NuSym, a company that looked as if they had exciting technology a few years back and was one of the early ... Tuesday, 06 July 2010 7. Brian Bailey disagrees with the experts on IP integration (MyBlog/TB-Blog) I love these experts at the table sessions that Extension Media have been doing and most of the time I think they are right on, but I started to read the one today and I just could not stop myself from ... Friday, 17 December 2010 8. Formal is more than just alive and well. It is thriving! (MyBlog/TB-Articles) ... of innovation in formal verification core techniques?” This just did not sound right to me and I made several comments in response to this, but I thought I should do more of a well thought out response ... Friday, 12 February 2010 9. New Book: TLM-Driven Design and Verification Methodology (MyBlog/TB-Blog) Well, at long last, I can finally talk about a project that I have been working on with Cadence over the past year. It is yet another book, this time on the subject of a TLM-driven design and verification ... Wednesday, 21 July 2010 10. Hot News - Synopsys acquire CoWare! (MyBlog/TB-Blog) ... from our very own Brian Bailey in the TechBites ESL and Verification communities. ... Monday, 08 February 2010 11. Virtual Conference – EDA: The Next Big Things (MyBlog/TB-Blog) ... Mixed Signal, System-on-Chip, High-Level Design, and Verification. Each session will also include a special "Ask the Experts" panel for attendees to ask their questions and network with vendors. The fifth ... Monday, 30 August 2010 12. My year in review (MyBlog/TB-Blog) ... put out two more books (ESL Models and their Application and TLM-driven Design and Verification) as well as more blogs than I care to mention and several white papers. I produced three fundamentals courses ... Thursday, 23 December 2010 13. Preparing for DAC (MyBlog/TB-Blog) ... present. I have been creating such papers, educations courses, presentations and other such product collateral for a number of years and for many companies in the verification, ESL and design spaces. ... Friday, 21 January 2011 14. 3 Big Shows Coming Up For Jasper Formal (MyBlog/TB-Blog) ... 27-28 DesignCon Paper: “Automating Higher Level Verification Methods via Property Synthesis,” Santa Clara, Calif., Feb. 3 DVCon: Jasper Booth #704, San Jose, Calif., Feb. 28 – March 3 For latest information, ... Tuesday, 18 January 2011 15. Synopsys and CoWare tie the knot. Virtual Prototyping on fire!! (MyBlog/TB-Blog) ... an about CoWare section, and second release from Synopsys that has a quote from them and an about Synopsys. Synopsys says "System-level design and verification solutions have been gaining traction among ... Monday, 08 February 2010 16. Imperas and OVP Provide Free ARM Cortex-M Cores (MyBlog/TB-Blog) ... Eclipse IDE, enabling easy use for software developers. In addition to working with the OVP simulator, these models work with the Imperas advanced tools for multicore software verification, analysis and ... Monday, 06 December 2010 17. Is Synopsys getting ready to buy EVE? (MyBlog/TB-Blog) ... products can extend the benefits of system-level visibility to development teams for hardware-software co-verification." "Adding support for TLM-2.0 gives software developers and hardware verification ... Tuesday, 01 June 2010 18. Creating an Open Source-based FPGA Design Flow (MyBlog/TB-Articles) ... what you are doing with regards to creating digital logic designs, starting a successful FPGA design house requires a few fundamental pieces: A development platform, A verification environment Formal ... Tuesday, 05 January 2010 19. Processor Design: System-On-Chip Computing for ASICs and FPGAs (MyBlog/TB-Reviews) ... arose almost daily. The, through the 1990s, processor design centralized around a few major players, including Intel, AMD, and TI - the ones who could afford the design, verification, and foundry costs ... Friday, 18 September 2009 20. BDTi, Xilinx, AutoESL and Synfora dispel rumors about high-level synthesis (MyBlog/TB-Articles) ... about 2X in design productivity, somewhat less than most vendors had been claiming, but in addition a 4X gain in verification. Their summary results are shown below. Synfora also provided me with ... Monday, 18 January 2010
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